AUTOSAR ECU Engineering
AUTOSAR engineering for automotive ECUs and Vehicle Control Units — multi-vendor tool chains, multi-MCU MCAL, SWC and MATLAB integration, multi-core OS tuning, Lauterbach / iSYSTEM diagnostics, and production Secure Boot.
CAPABILITY MAP
We are not tied to a single tool chain or MCU. We integrate with your existing ECU, production plan, and safety requirements end-to-end — from ARXML design to production Secure Boot.
Hands-on experience with Vector DaVinci / MICROSAR, EB tresos, ETAS RTA-CAR, KPIT, and Mentor Volcano; we can also integrate OEM-proprietary stacks.
Production experience on Infineon AURIX, NXP S32, ST SPC58 / Stellar, TI Hercules / Jacinto, and Renesas RH850 automotive MCUs.
SWC decomposition, port interfaces, and runnable design — plus MATLAB Simulink + Embedded Coder to generate AUTOSAR-compliant SWC source and ARXML.
AUTOSAR OS task / resource / counter configuration, multi-core mapping, inter-core IOC communication, and real-time performance tuning.
UDS / Dcm / Dem design, integrated with Lauterbach TRACE32 and iSYSTEM winIDEA for real-time trace, measurement, and field issue analysis.
HSM configuration, Secure Boot flow design, key generation and custody, production line flashing and signing — aligned with UN R155 / ISO 21434.
MCAL / BSP
We have accumulated MCAL and BSP integration experience across major automotive MCU families. You can keep your current silicon or let us help you select one.
AURIX TC3xx / TC4xx
S32K / S32G / MPC57xx
SPC58 / Stellar
Hercules TMS570 / Jacinto
RH850 / RL78
FROM ARCHITECTURE TO PRODUCTION
Four engineering milestones take the program from system and ECU architecture through hardware integration and production validation, with clear inputs, outputs, and review gates at every stage.
System Description, ECU Extract, ARXML, port interfaces, and SWC planning.
Configure BSW, MCAL, OS, COM, Dcm, Dem, and Nvm for the target MCU and generate code.
Complete SWC design, RTE generation, and translate MATLAB Simulink models into AUTOSAR framework source.
Integrate on hardware with Lauterbach / iSYSTEM debugging, deploy Secure Boot and EOL encryption, and complete production validation.
ENGINEERING OUTPUT
At project completion, you receive production-ready, long-term maintainable deliverables — design files, configurations, source code, safety documents, and production flow.
Complete System Description, ECU Extract, BSW / MCAL configuration, and generation scripts.
Software Component C source, runnables, ports, RTE generation files, and version tags.
Simulink models, Embedded Coder configuration, and generated AUTOSAR SWC framework source.
UDS / Dcm / Dem design, DTC tables, Lauterbach or iSYSTEM trace scripts, and analysis reports.
Secure Boot design documents, key generation flow, HSM configuration, and production signing scripts.
BSW / SWC integration test reports, EOL scripts, version logs, and field issue response procedures.
COMPLIANCE BY DESIGN
Our AUTOSAR engineering process aligns with international standards and production audit requirements, with full requirement-design-test traceability.
Supports ASIL analysis, safety mechanisms, and documentation based on the Item Definition, HARA, and Safety Goals; targets and deliverables follow the project safety plan.
Security risk assessment, Secure Boot, secure communication, TARA documentation, and production encryption flow.
Supports Classic R20-11 / R22-11 / R23-11 and Adaptive AP integration.
Bidirectional traceability matrix aligned with ASPICE Level 2 / 3.
We have production experience with all major commercial chains — Vector DaVinci / MICROSAR, EB tresos, ETAS RTA-CAR, KPIT, and others. If your OEM uses a proprietary stack, we can integrate that too. We are vendor-agnostic.
We have integrated AUTOSAR MCAL on Infineon AURIX TC3xx / TC4xx, NXP S32K / S32G, ST SPC58 / Stellar, TI Hercules, and Renesas RH850. Other platforms can be evaluated on request.
We design the SWC interfaces and ARXML framework, then either party uses MATLAB Simulink with Embedded Coder to generate AUTOSAR-compliant C source. We complete RTE and BSW integration and verification. We can also reverse-import existing SWCs into Simulink for behavioral verification.
Based on real-time requirements, safety level, and resource budget, we plan OS task placement across cores, inter-core IOC communication, and shared resource protection. Performance is measured with Lauterbach or iSYSTEM (CPU load, jitter, latency) and iterated.
We design a Secure Boot flow on the target MCU's HSM, including multi-stage bootloader verification, key generation and custody, and production line flashing and signing — aligned with UN R155 / R156, ISO 21434, and OEM production audit requirements.
In development we integrate Lauterbach TRACE32 and iSYSTEM winIDEA with AUTOSAR OS and RTE for real-time trace, variable monitoring, breakpoints, and performance analysis. In production, we use UDS, DTC, and ODX tools for remote and field diagnostics.
